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AND

Logical AND gate. Output is 1 when both integer inputs are non-zero, else 0.

Category: Digital Logic / Gates

Keywords: &, boolean, logic, gate, binary

Ports

NameDirectionValue typeNotes
in_ainputint
in_binputint
outoutputint

Parameters

This component has no user-editable parameters.


Implemented in C++ class SimCompCtlAnd (components/control/CSim_comp_ctl_and/sim_comp_ctl_and.h).

Released under the MIT License.