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AND
Logical AND gate. Output is 1 when both integer inputs are non-zero, else 0.
Category: Digital Logic / Gates
Keywords: &, boolean, logic, gate, binary
Ports
| Name | Direction | Value type | Notes |
|---|---|---|---|
in_a | input | int | |
in_b | input | int | |
out | output | int |
Parameters
This component has no user-editable parameters.
Implemented in C++ class SimCompCtlAnd (components/control/CSim_comp_ctl_and/sim_comp_ctl_and.h).