Skip to content

OR

Logical OR gate. Output is 1 when either integer input is non-zero, else 0.

Category: Digital Logic / Gates

Keywords: |, , boolean, logic, gate, binary

Ports

NameDirectionValue typeNotes
in_ainputint
in_binputint
outoutputint

Parameters

This component has no user-editable parameters.


Implemented in C++ class SimCompCtlOr (components/control/CSim_comp_ctl_or/sim_comp_ctl_or.h).

Released under the MIT License.